>From: duncan@super.org (Duncan A. Buell)
Newsgroups: comp.cad.cadence,comp.arch,comp.lang.vhdl,comp.lang.verilog,comp.lsi
Subject: Request for comments/opinions on FPGA programming
Date: 24 Feb 93 19:07:00 GMT
Organization: Supercomputing Research Center (Bowie, MD)

We have just successfully built an attached processor for a Sun Sparc 2
workstation using Xilinx 4010 FPGAs (by "successfully built" I mean that
as of this past week we are running real programs on real hardware) (and
for the cognoscenti among the readership, I am referring to Splash 2).
One of the major issues in using such a processor is the ability to
"program" it as if it were a computer (as opposed to "design circuits"
for it).  We are using VHDL as an *applications programming language* and
are presently doing both simulation (for debugging) and synthesis to the
FPGAs using commercial VHDL software tools.  The decision to use VHDL was
not based on the belief that VHDL was the magic answer but rather on the
premise that it would be good enough to allow us to do real applications
while we learned enough to know what the magic answer was (we would thus
get real work done during the learning process).

In addition, I am co-chair of an IEEE workshop to happen in April on the
use of FPGAs for custom computing machines.  One of the major items on the
program and the agenda is the tricky question of how to program such a
computer.

I am posting to solicit input on the following matters, both for our own
consideration at SRC and for discussions to take place at the workshop:
1.  Public domain/free/cheap synthesis software from something
    resembling a high level language to FPGAs in general and
    Xilinx in particular.
2.  The quality of Verilog (or something else) versus VHDL for
    this purpose (this is not (necessarily) a request for theological
    arguments (read "flames") regarding VHDL--we *are* succeeding in
    getting applications programmed, so that part of the "experiment"
    is already successful).
3.  General comments on the programming of FPGA-based computers
    in high level languages.

Please send comments to me personally.  I will summarize and
repost after a respectable interval.

 ---------------------------------------------------------------

In a similar vein, we have established at SRC some mailing lists:

	info-fpga-computing@super.org
A list for the discussion of FPGA based computing machined.
Contributions to this address will be automatically reflected to each
of the mailing list subscribers.

	info-fpga-computing-request@super.org
Requests to be added or removed from the info-fpga-computing list
should be sent to this address.  Mail to the "-request" list will only
go to SRC, and we will maintain the actual list.

	info-splash@super.org
A list for the discussion of Splash 2 specific issues.  Whenever we send
out the software, we will add the point of contact to this list.

	info-splash-request@super.org
Requests to be added or removed from the info-splash list should be
sent to this address.

Duncan Buell

 ----------------------------------------------------------------------
|   Duncan A. Buell                    Senior Research Scientist       |
|   301-805-7372                       Supercomputing Research Center  |
|   301-805-7602 (FAX)                 17100 Science Drive             |
|   duncan@super.org                   Bowie, Maryland 20715           |
 ----------------------------------------------------------------------