Article 1650 of comp.lsi: Path: Intrepid!moe.ksu.ksu.edu!zaphod.mps.ohio-state.edu!cs.utexas.edu!swrinde!gatech!concert!mcnc!mcnc!kk From: kk@mcnc.org (Krzysztof A. Kozminski) Newsgroups: comp.lsi Subject: Re: Implementations of ISCAS benchmarks? Message-ID: <1992Jul18.032751.14542@mcnc.org> Date: 18 Jul 92 03:27:51 GMT References: Organization: MCNC Center for Microelectronics, RTP, NC Lines: 32 In article dinesh@civic.ece.cmu.edu (Dinesh D. Gaitonde) writes: > >Has anyone done the actual layout for any of the ISCAS benchmark circuits? >I would be interested in pointers to any sources for the above. Standard cell layouts for all ISCAS'85 benchmarks (and a couple of ISCAS'89) are avaialble from MCNC. They have been used by several researchers over the last two years. The technology mapping involved in layout synthesis was kept as simple as possible, with no optimization other than phase assignment. To obtain the layouts, one needs to return to MCNC a non-disclosure agreement. I used to have it on-line but it got changed last week. I'll try to put it on our ftp server on Monday. It all (except for the proprietary cell layouts which are shipped by e-mail after receiving the non-disclosure agreement) should sit in pub/benchmark/ISCASlayouts. The ftp server is mcnc.mcnc.org, or mcnc.org, or 128.109.130.3, or 128.109.131.1. Login is anonymous, please supply your e-mail address as password so that we can contact you in case of any updates. >On a related note, do you have any layouts for combinatorial circuits >of fairly large complexity? I have several versions of a 16-bit multiplier (the 'struct' benchmark from the 1989-92 Physical Design and Layout Synthesis Wkshops), including the smallest currently known solution. Requires the same non-disclosure agreement. KK -- Kris Kozminski kk@mcnc.org "The party was a masquerade; the guests were all wearing their faces."