From Intrepid!moe.ksu.ksu.edu!zaphod.mps.ohio-state.edu!qt.cs.utexas.edu!cs.utexas.edu!uunet!stanford.edu!cascade.stanford.edu!sirius.Stanford.EDU!rgupta Fri Nov 29 14:20:25 CST 1991 Article 1276 of comp.lsi.cad: Path: Intrepid!moe.ksu.ksu.edu!zaphod.mps.ohio-state.edu!qt.cs.utexas.edu!cs.utexas.edu!uunet!stanford.edu!cascade.stanford.edu!sirius.Stanford.EDU!rgupta >From: rgupta@sirius.Stanford.EDU (Rajesh K. Gupta) Newsgroups: comp.lsi.cad Subject: Re: Olympus Synthesis System (Release 4.0) Message-ID: <1991Nov27.201022.15470@cascade.Stanford.EDU> Date: 27 Nov 91 20:10:22 GMT References: <1991Nov26.222759.5762@cascade.Stanford.EDU> Sender: news@cascade.Stanford.EDU (USENET News System) Organization: Center for Integrated Systems, Stanford University, California Lines: 26 In article rpj@echo.canberra.edu.au (Ross Johnson) writes: > >What is the "Olympus synthesis system"? > Briefly, Olympus synthesis system refers to a set of programs developed by the synthesis group here at Stanford to perform the following: behavioral synthesis structural synthesis technology mapping Behavioral input is specified using an internally developed HDL, called HardwareC. The final synthesis output is a netlist description using a choice of three libraries: actel, lsi, cmos3. Olympus R4.0 provides a graphical interface to manage the overall synthesis task. Olympus also provides facilities of data interchange to Berkeley MIS/SIS for any user-driven logic synthesis. For a more detailed description, please see IEEE Design and Test, Oct 1990. Rajesh Gupta rgupta@sirius.stanford.edu