

Article 1276 of comp.lsi.cad:
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>From: [email-masked] (Rajesh K. Gupta)
Newsgroups: comp.lsi.cad
Subject: Re: Olympus Synthesis System (Release 4.0)
Message-ID: <[email-masked]>
Date: 27 Nov 91 20:10:22 GMT
References: <[email-masked]> <rpj.691205312@ise>
Sender: [email-masked] (USENET News System)
Organization: Center for Integrated Systems, Stanford University, California
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In article <rpj.691205312@ise> [email-masked] (Ross Johnson) writes:
>
>What is the "Olympus synthesis system"?
>

Briefly, Olympus synthesis system refers to a set of programs developed
by the synthesis group here at Stanford to perform the following:

	behavioral synthesis 
	structural synthesis 
	technology mapping

	Behavioral input is specified using an internally developed
HDL, called HardwareC.   The final synthesis output is a netlist
description using a choice of three libraries: actel, lsi, cmos3.
Olympus R4.0 provides a graphical interface to manage the overall
synthesis task. Olympus also provides facilities of data interchange to
Berkeley MIS/SIS for any user-driven logic synthesis.

	For a more detailed description, please see IEEE Design and 
Test, Oct 1990. 

Rajesh Gupta					[email-masked]