From Intrepid!moe.ksu.ksu.edu!zaphod.mps.ohio-state.edu!mips!spool.mu.edu!agate!darkstar!karplus Sat Apr 25 20:24:16 CDT 1992
Article 1613 of comp.lsi.cad:
Path: Intrepid!moe.ksu.ksu.edu!zaphod.mps.ohio-state.edu!mips!spool.mu.edu!agate!darkstar!karplus
>From: karplus@cse.ucsc.edu (Kevin Karplus)
Newsgroups: comp.lsi.cad
Subject: Re: wanted: latchup detector
Message-ID: <33873@darkstar.ucsc.edu>
Date: 25 Apr 92 23:39:10 GMT
References: <1992Apr24.195656.2215@udel.edu>
Sender: usenet@darkstar.ucsc.edu
Reply-To: karplus@ce.ucsc.edu (Kevin Karplus)
Lines: 20

We use three checks of substrate and well contacts here at UCSC.

One is "ohmics" from UW---it works from .CIF files.

Another check is done by a special CIF output style in magic, which
uses the cifoutput routines to generate a FETERR layer for any
transistors too far from contacts of the appropriate type.

The third check uses a special EXTRACT style that doesn't generate
transistors---just well and substrate contacts.  The final circuit is
run through a awk script to report which signals are connected to
wells or substrate.  If any signals besides Vdd and ground are
connected (or Vdd and ground are connected to the wrong contact type),
you have a problem.  

Before we added these checks to the routine checks required of all
chips, we did occasionally have problems with students shorting
signal lines to wells.

Kevin Karplus