From kuhub.cc.ukans.edu!wupost!spool.mu.edu!howland.reston.ans.net!math.ohio-state.edu!uwm.edu!rpi!cii3116-24.its.rpi.edu!geuskb Sat Oct 23 08:52:08 CDT 1993
Article: 2633 of comp.lsi
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Newsgroups: comp.lsi
Subject: MOSIS chip fabrication
Message-ID: <29hiel$pro@usenet.rpi.edu>
From: geuskb@cii3116-24.its.rpi.edu (Bibiche Micha Geuskens)
Date: 13 Oct 1993 18:46:45 GMT
Reply-To: geuskb@rpi.edu
Distribution: world
Organization: Rensselaer Polytechnic Institute, Troy, NY.
Keywords: pads
NNTP-Posting-Host: cii3116-24.its.rpi.edu
Lines: 14

Hi,

	About two weeks ago we got some chips back from MOSIS. It seems that
there is a short between VDD and GND for all the chips. On first sight, there 
are no obvious shorts in the circuits themselves. On the other hand, the wire
bonding of several pins does not seem to be constrained on the pads, but also
extends over the driving circuitry. We were wondering if this might cause a 
problem (a short for example) and whether anyone has run into a similar problem?

Thanks,

Bibiche (geuskens@unix.cie.rpi.edu)