====================================================================
size = 449*383
area = 171967
delay = 15.20
====================================================================
chipstats: Version 1.0 : Chip  add:placed

	Number of instances    = 36
	Number of nets         = 46
	Number of connectors   = 221
	Number of vias         = 140

	Average instance area  =        2685.33
	St.dev. instance area  =         906.35
	Chip Area W x H        =    449 x   383
	Chip Area              =      171967.00 (100.00%)
	Total Instance Area    =       96672.00 ( 56.22%)
	Routing + Empty Area   =       75295.00 ( 43.78%)
	Total   net area       =       68593.50
	Total   net length     =       15340.50
	Average net length     =         333.49
	St.dev. net length     =         278.81

***** 6 LONGEST NETS
(---) NAME                  LENGTH (lambda)  AREA (lambda^2)
(  1) GROUND                        1432.00             15672.00
(  2) SUPPLY                        1396.00             15384.00
(  3) b0                             683.00              2049.00
(  4) [548]                          636.00              1908.00
(  5) [441]                          599.00              1797.00
(  6) a0                             554.50              1663.50
====================================================================
MISII: Chip add:logic
 ... using library delay model
{s3}      : arrival=(15.20 15.20) 
[596]     : arrival=(14.20 14.20) 
[404]     : arrival=(14.20 14.20) 
[466]     : arrival=(13.00 13.00) 
{s2}      : arrival=(11.60 11.60) 
====================================================================