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Architectural Frameworks for MPP System on a Chiphot!

26.04.2003

David Andrews and Douglas Niehaus, Architectural Frameworks for MPP System on a Chip, Proceedings of the Third Workshop on Massively Parallel Processing (MPP), April 2003, Nice, France.

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Using the Multi-Threaded Computation Model as a Unifying Framework...hot!

26.06.2003

Niehaus, D. , Andrews, D., Using the Multi-Threaded Computation Model as a Unifying Framework for Hardware-Software Co-Design and Implementation, Proceedings of the 9th International Workshop on Object-oriented Real-time Dependable Systems (WORDS 2003).

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Programming Models for Hybrid FPGA/CPU Computational Componentshot!

14.01.2004

Andrews, D., Niehaus, D., and Ashenden, P., Programming Models for Hybrid FPGA/CPU Computational Components, IEEE Computer, January 2004.

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Implementing the Thread Programming Model on Hybrid FPGA/CPU Computational Componentshot!

09.02.2004

Andrews, D., Niehaus, D., Jidin, R., Implementing the Thread Programming Model on Hybrid FPGA/CPU Computational Components, Proceedings of the 1st Workshop on Embedded Processor Architectures (WEPA) held in conjunction with the International Symposium on Computer Architecture, February, 2004, Madrid, Spain.

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Implementing Multi Threaded System Support for Hybrid Computational Componentshot!

26.06.2004

Jidin, R., Andrews, D., Niehaus, D., Implementing Multi Threaded System Support for Hybrid Computational Components, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), June 2004, Las Vegas, Nevada.

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