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The Case for High Level Programming Models for Reconfigurable Computershot!

26.06.2006

David Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot and Ed Komp, The Case for High level Programming Models for Reconfigurable Computers, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) June 2006. pp. 21-30

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Architectural Frameworks for MPP System on a Chiphot!

26.04.2003

David Andrews and Douglas Niehaus, Architectural Frameworks for MPP System on a Chip, Proceedings of the Third Workshop on Massively Parallel Processing (MPP), April 2003, Nice, France.

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Enabling a Uniform Programming Model Across the Software/Hardware Boundaryhot!

10.04.2006

Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David Andrews, Enabling a Uniform Programming Model Across the Software/Hardware Boundary, Proceedings of the The Fourteenth Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Napa, CA, 24-26 April 2006. pp. 89 - 98

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Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transformshot!

27.03.2005

R. Jidin, D. Andrews, W. Peck, D. Chirpich, K. Stout, J. Gauch, Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transform, Accepted at 12th Reconfigurable Architectures Workshop (RAW 2005), April 4-5, 2005, Denver, Colorado, USA.

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FPGA Implementation of a Priority Scheduler Modulehot!

24.12.2004

J. Agron, D. Andrews, M. Finley, E. Komp, W. Peck, FPGA Implementation of a Priority Scheduler Module, In Proceedings of the 25th IEEE International Real-Time Systems Symposium, Works In Progress Session (RTSS, WIP 2004). Lisbon, Portugal, December 5-8, 2004.

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