Downloads
DocumentsDate added
-
Programming Models for Hybrid FPGA/CPU Computational Componentshot!
-
14.01.2004
-
Andrews, D., Niehaus, D., and Ashenden, P., Programming Models for Hybrid FPGA/CPU Computational Components, IEEE Computer, January 2004.
-
Hits: 768
-
-
FPGA Implementation of a Priority Scheduler Modulehot!
-
24.12.2004
-
J. Agron, D. Andrews, M. Finley, E. Komp, W. Peck, FPGA Implementation of a Priority Scheduler Module, In Proceedings of the 25th IEEE International Real-Time Systems Symposium, Works In Progress Session (RTSS, WIP 2004). Lisbon, Portugal, December 5-8, 2004.
-
Hits: 759
-
-
Hardware/Software Co-Design of Operating System Services for Thread Management and Schedulinghot!
-
24.12.2004
-
W. Peck, J. Agron, D. Andrews, M. Finley, E. Komp, Hardware/Software Co-Design of Operating System Services for Thread Management and Scheduling, In Proceedings of the 25th IEEE International Real-Time Systems Symposium, Works In Progress Session (RTSS, WIP 2004). Lisbon, Portugal, December 5-8, 2004.
-
Hits: 754
-
-
Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transformshot!
-
27.03.2005
-
R. Jidin, D. Andrews, W. Peck, D. Chirpich, K. Stout, J. Gauch, Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transform, Accepted at 12th Reconfigurable Architectures Workshop (RAW 2005), April 4-5, 2005, Denver, Colorado, USA.
-
Hits: 744
-
-
Hybridthreads Compiler: Generation of Application Specific Hardware Thread Cores from Chot!
-
05.09.2007
-
FPL07 PhD forum paper about the Hybridthreads Compiler. Since the PhD forum only allows 2 page papers, this is a very high level overview of the system.
-
Hits: 678
-
|
|