The implementation of a Synthetic Aperture Radars (SAR) is quite similar to a radio communications transceiver. Both have a transmitter, both require a sensitive, complex receiver, both require complex signal processing to create specific antenna patterns, and both utilize digital signal processing techniques. So, almost all the requirements for radio communications processing and advantages of FPGAs apply directly to SAR processing. However, SAR processing presents several additional functional requirements [8]. First, SAR systems require storage of the received complex signal for a period of time, hence FPGA implementations must contend with large memories and memory access. Second, many accesses to memory are data dependent, i.e. the values of data elements determine the memory address. An example is the need to use platform position and orientation to select returned signal samples from memory. Third, SAR systems rely on external data, such as elevation databases and geodetic information necessary to fuse SAR data with other geographic information. These additional requirements, plus the importance of SAR systems to the Defense mission, argue for including SAR processing functions in the design, implementation and testing of the Functional Programming Environment, evaluating SAR functions on prototype FPGA implementations, and using the evaluation information in recommendations to future FPGA architectures.
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