RTR-JVM

From RTR-JVM

Run-Time Reconfigurable Java Virtual Machine

Goal

The goal of the RTR-JVM project is to develop a novel architecture for high-performance embedded computing systems.

The basic idea is that we use Field-Programmable Gate Arrays (FPGAs) to implement a large number of hardware features for a Java application. These features are extracted and synthesized at compile-time. At run-time, as the application executes, the Java Virtual Machine (JVM) monitors the behavior of the application and a subset of the hardware features are dynmically configured into the FPGA. Based on the program's run-time behavior, more beneficial features displace the less beneficial features.

The thesis of our work is that system-level optimizations can yield higher speed, better resource utilization, and better energy management.

Questions

To establish this, we are primarily looking at several core questions.

• How to automate the processs?
  Managing Run-Time Reconfiguration (RTR) is not simple and right now the state-of-the-art is a manual, complex job.
• What is the range of reasonable parameters?
  A big question is whether the overhead cost of RTR is is justified. As part of our effort, we are looking into what range of parameters maximizes performance. For example,
  • selection algorithm --- an online decision algorithm that determines when and what to reconfigure
  • rates --- how frequently we profile the application to determine major phase changes and how often to invoke the selection algorithm
  • granularity -- how big should we reconfigure during each change (we originally replaced whole classes, now we do replace methods, we are interested in exploring even fine-grain reconfigurations)
  • placement algorithm --- placing and connecting features in the FPGA may impact performance; we are interested measuring its impact
• How much specialization?
  There is an enormous number of ways to specialize hardware being reconfigured. We are interested in having multiple implementations on hand and we reconfigure the implementations with run-time desirable trade-offs (such as area, power, specificity).

Sponsor

This material is based upon work supported by the National Science Foundation under Grant No. 0410790.

Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.