EECS 312

EECS-312 syllabus Spring 2005

Course Material and handouts

Chapter 3 -Diodes

Section 3.1 - The Ideal Diode

Reading: 140 - 146

Examples: 3.2

Exercises: 3.1, 3.2, 3.4

Handouts:

Linear & Nonlinear Devices

The Ideal Diode

Diode Mechanical Analogy

The Ideal Diode Circuit Analysis Guide

Example: A Simple Ideal Diode Circuits

Example: Analysis of a Complex Diode Circuit

Section 3.2 - Terminal Characteristics of Junction Diodes

Reading: 147 - 153

Examples: 3.3

Exercises: 3.6, 3.7, 3.9

Handouts:

The PN Junction Equation

The Junction Forward Bias Equation

Example: A p-n Junction Diode Circuit

Section 3.3 – Modeling the diode forward Characteristics

Reading: 153-166

Examples: 3.5

Exercises: 3.10, 3.11, 3.12, 3.13

Handouts:

The Ideal Diode Model

The Constant Voltage Drop Model

The Piece-wise Linear Model

Example: Junction Diode Models

Example: Another Junction Diode Model Example

Small-Signal Model

Small-Signal Analysis

Small-Signal Analysis Steps

Example: Diode Small-Signal Analysis

Section 3.4 - Operation in the Reverse Breakdown Region - Zener Diodes

Reading: 167-171

Examples: 3.8

Exercises: 3.17, 3.18, 3.19

Handouts:

Zener Diode Notation

Zener Diode Models

Shunt Regulator Analysis

Example: The Shunt Regulator

Section 3.5 - Rectifier Circuits

Reading: 171-184

Examples: 3.9

Exercises: 3.20, 3.22, 3.24

Handouts:

The Half-Wave Rectifier

The Full-Wave Rectifier

The Bridge Rectifier

The Peak Rectifier

Section 3.6 - Limiting and Clamping Circuits

Reading: 184 - 190

Exercises: 3.27, 3.28

Handouts:

Steps for Analyzing Limiter Circuits

Example: A Diode Limiter

Section 3.7 - Physical Operation of Diodes

Reading: 191 - 209

Exercises: 3.29, 3.31, 3.34

Handouts:

The Intrinsic Silicon

Doped Silicon

Drift Current and Diffusion Current

The pn Junction (open circuit)

The pn Junction under Forward Bias Conditions

The pn Junction with Reverse Bias

Section 3.8 – Special Diode Types

Reading: 209 - 211

Handouts: No handouts for this section—just read the text in the book!

Chapter 4 – MOS Field - Effect Transistors (MOSFET)

Section 4.1 - Device Structure and Physical Operation

Reading: 236 - 248

Examples: 4.1

Exercises: 4.1, 4.2, 4.3

Handouts:

Structure of an NMOS Enhancement FET

Creating a Channel for Current Flow

Applying a Small VDS

Device Operation as VDS is Increased

Section 4.2 - Current-Voltage Characteristics

Reading: 248 - 261

Exercises: 4.4, 4.6

Handouts:

Drain Current for Small VDS

The p-channel MOSFET

Drain Output Resistance

The Body Effect

Section 4.3 - MOSFET Circuits a DC

Reading: 262 - 270

Examples: 4.2 through 4.7

Exercises: 4.10, 4.12, 4.14, 4.16

Handouts:

Steps for DC FET Circuits Analysis

Example: NMOS Circuit Analysis

Example: Another NMOS Circuit Analysis

Example: PMOS Circuit Analysis

Example: Depletion MOSFET Circuit Analysis

Section 4.4 - The MOSFET as an Amplifier and as a Switch

Reading: 270 - 281

Examples: 4.8

Exercises: 4.17, 4.18

Handouts:

The MOSFET as an Amplifier and as a Switch

Section 4.6 – Small-signal Operation and Models

Reading: 287 - 299

Examples: 4.10

Exercises: 4.23 through 4.29

Handouts:

Small-Signal Response of MOSFET Circuit

The MOSFET Small-Signal Model

Example: Small-Signal Analysis of MOSFET Amplifier

Section 1.7 – Digital Logic Inverter

Reading: 40 - 48

Examples: 1.6

Exercises: 1.24, 1.25

Handouts:

The ideal Inverter

Noise Margins

Gate Propagation Delay

Gate Power Dissipation

Delay-power Product

Section 4.10 - The CMOS Logic Inverter

Reading: 336-346

Exercises: 4.41, 4.42, 4.43

Handouts:

CMOS Inverter

CMOS Transfer Function

Peak CMOS Current

CMOS Output Resistance

Section 4.11 - The Depletion-Type MOSFET

Reading: 346 - 350

Exercises: 4.51

Handouts:

The Depletion MOSFET (NMOS)

Chapter 10 – Digital CMOS Logic Circuits

Section 10.3 – CMOS Logic Circuits

Reading: 963-974

Examples: 10.2

Exercises: 10.4, 10.5

Handouts:

CMOS Device Basic Structure

Synthesis of CMOS Logical Gates

Example: CMOS Logic Gate Synthesis

Section 10.4 - Pseudo-NMOS Logic Circuits

Reading: 974-982

Examples: 10.3

Exercises: 10.6

Handouts:

The Depletion Load

Pseudo-NMOS Load

Chapter 11 – Memory and Advanced Digital Circuits

Section 11.1 - Latches and Flip-Flops

Reading: 1013 - 1021

Handouts:

The Digital latch

S-R Flip-Flop

D Flip-Flop

Section 11.3 - Semiconductor Memories: Types and Architectures

Reading: 1028-1030

Exercises: 11.7

Handouts:

Computer Memory Types

Semiconductor Memories

Section 11.4 - Random Access Memory (RAM) Cells

Reading: 1031 - 1038

Handouts:

Memory cells

Section 11.5 - Sense Amplifiers and Address Decoders

Reading: 1038-1046

Exercises: 11.14, 11.15

Handouts:

Address Decoders

Section 11.6- Read Only Memory (ROM)

Reading: 1046-1051

Handouts:

Read-only Memory

Chapter 5 - Bipolar Junction Transistors

Section 5.1 - Device Structure and Physical Operation

Reading: 377-392

Exercises: 5.1, 5.3, 5.4, 5.6, 5.7, 5.8, 5.9

Handouts:

BJT Structure and Mode of Operation

The npn Transistor in the Active Region

The npn BJT in Saturation

The npn Transistor in cut-off

Example: A BJT Circuit

Section 5.2 – Current-Voltage Characteristics

Reading: 392-407

Examples: 5.1

Exercises: 5.10, 5.14, 5.15

Handouts:

BJT Symbols and Conventions

A Mathematical Description of BJT Behavior

Section 5.3 - The BJT as an Amplifier and as a Switch

Reading: 407-421

Examples: 5.2, 5.3

Exercises: 5.19, 5.20, 5.21

Handouts:

The pnp BJT in Active Mode

Circuit Analysis Procedure for Cutoff and Sat.

Example: BJT Circuit in Saturation

Example: pnp BJT in Cutoff/Saturation

Graphical Analysis of BJT "Switch"

Section 5.4 - Analysis of Transistor Circuits at DC

Reading: 421-436

Examples: 5.4 – 5.12

Exercises: 5.22 – 5.29

Handouts:

Steps for DC BJT Analysis

Hints on Circuit Analysis

Example: DC Analysis of Transistor Circuit

Example: DC Analysis of a Transistor Circuit (pnp)

Example: Another DC Analysis of a Transistor Circuit