EECS 723 – Homework
Assignments (Spring 05)
Homework Policy (Please
Read!)
Due
Date Assignment
Jan 21 none
Jan 24 none
Jan 26 none
Jan 28 #1: 2.2,
SP 2.1-1
Jan 31 none
Feb 2 none
Feb 4 none
Feb 7 #2: 2.10,
SP
2.3-3, SP 2.3-5
Feb 9 #3: 2.8, 2.9, 2.14,
SP 2.3-7, SP 2.3-8
Feb 14 none
Feb 16 #5: 2.19(d), 2.20(d), 2.21(d), 2.22, 2.23
Feb 18 #6: SP 2.4-1
Feb 21 #7:
2.25 1, 2.26
Feb 23 #8:
SP 2.6-1, SP 2.6-2, SP
2.6-3
Feb 25 Expo
Note 1– Do not plot SWR—just complete the design.
Feb 28 none
Mar 2 none
Mar 4 Exam I
Mar 9 #10:
4.7 2,
SP 4.2-4, SP 4.2-5
Mar 11 #11: 4.10, 4.28,
SP
4.3-2
Note 2– You must find an impedance and admittance
matrix for both circuit (a) and circuit (b), for a total of 4
matrices.
Mar 14 #12: 4.223, 4.244
Mar 16 none
Mar 18 #13: 4.305, SP
4.5-1
Note 3- Determine A,B,C,D values by applying their definition
to each circuit and then performing the circuit analysis. The value Y expresses the device
admittance.
Note 4- Note
that there are three, cascaded two-port devices in this circuit (a
series resistor, a transformer, a transmission line). The transmission for each is known (Table 4.1). Determine the transmission matrix for each,
and then the overall transmission matrix for the 3 cascaded
devices. Then determine the load
voltage VL , using this overall transmission matrix.
Note 5 - In this
problem, P1 is the power incident on port 1, and P2
and P3 is the power absorbed (!) by the loads
on ports 2 and 3, respectively. YOU
must think about what these powers are in terms of node values a
and b !!!
Mar 21 Spring
Break
Mar 23 Spring
Break
Mar 25 Spring
Break
Mar 28 none
Mar 30 none
Apr 4 none
Apr 6 none
Apr 8 none
Apr 11 none
Apr 13 # 15:
7.1, 7.4
Apr 15 # 16:
7.56, 7.7
Note 6 – Do not determine the scattering
parameters—just design the divider.
Apr 18
none
Apr 20 Design
Project #1
Apr 22 #17:
SP
7.3-1
Apr 25 none
Apr 27 none
Apr 29 Design
Project #2
May 2 #18:
SP
8.5-1
May 4 none
May 6 none
May 9 11.1
May 11 none
May 13 Stop
Day